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RTI FPGA Programming Blockset

Integrating FPGA models in dSPACE systems

The RTI FPGA Programming Blockset is a Simulink blockset for using an FPGA model created with the Xilinx® System Generator Blockset with a dSPACE system.

Application Areas

The RTI FPGA Programming Blockset is a Simulink blockset for using an FPGA model created with a dSPACE system using the Xilinx® System Generator Blockset. It provides RTI blocks for implementing the interface between the FPGA mounted on a dSPACE board and its I/O, and the interface between the dSPACE FPGA board and its computation node.
The blockset can be used with the following dSPACE FPGA platforms, which provide user-programmable FPGAs:

  • DS5203 FPGA Board and its I/O modules.
  • DS2655 FPGA Base Board  and its I/O modules.
  • MicroAutoBox II 1401/1511/1514 and 1401/1513/1514 extended with I/O modules.
  • MicroLabBox.

Typical application scenarios for rapid control prototyping (RCP) and hardware-in-the-loop (HIL) simulation are:

  • Projects in automotives, industrial automation, medical engineering, and aerospace industries
  • Signal preprocessing, adapting new interfaces, very fast control loops, designing and testing new concepts for electrified powertrains 


The dSPACE FPGA platforms provide a Xilinx FPGA, for which you can implement an application graphically using the Xilinx System Generator in Simulink. The RTI FPGA Programming Blockset lets you integrate the resulting FPGA model in a Simulink model that runs on dSPACE hardware. The RTI FPGA Programming Blockset is a convenient way to connect the I/O board’s I/O driver components and to model the connection to a processor-based computation node (DS1005, DS1006 or DS1007 processor boards or MicroAutoBox II). The data exchange supports fixed point data types as well as floating point data types. Thus, FPGA programming is seamlessly integrated into the Simulink environment. With the FPGA blockset, you can synthesize, build, and program the FPGA or processor directly from Simulink for optimal convenience. Alternatively, the handcode interface lets you program the FPGA boards in VHDL (VHSIC Hardware Description Language) or Verilog.

Functionality Description
  • Integrating an FPGA model on a dSPACE FPGA platform
  • I/O configuration
  • Automatic generation of a processor model template on the basis of an FPGA application
FPGA interface
  • Programming the FPGA with the Xilinx® System Generator
  • Integrating an FPGA model created with the Xilinx System Generator
  • Offline simulation in Simulink
Handcode interface
  • Programming the FPGA in VHDL or Verilog
I/O access
  • Connecting the FPGA model with analog and digital input and output signals with the RTI FPGA Blockset
Processor-FPGA communication
  • Connecting the FPGA model with the processor model running on the computation node (DS1006 or DS1007, SCALEXIO Processing Unit, MicroLabBox or MicroAutoBox II)
  • Access types for system bus communication with the dSPACE FPGA platforms: register, register groups, buffer
Asynchronous tasks
  • Implementing interrupt-driven tasks in the processor model triggered from the FPGA model

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